TSMC 28NM CMOS RF HIGH PERFORMANCE COMPACT MOBILE COMPUTING 0.9/1.8V
Technology characteristics
Shrink technology: YES
Core voltage: 0.9V
I/O voltage: 1.8V
Shallow Trench Isolation (STI)
Wells: Retrograde twin well for low well sheet resistance and better latch-up behavior.
Triple well, Deep N-Well in option
Dual Gate Oxide
Vt options: ulvt, lvt, svt, hvt, uhvt, ehvt
5V HVMOS
HighRes resistors
Temperature range: -40C to 125C
# of metals: 5 to 10 Cu + ALRDL
Interconnect dielectric: ELK
Top metal: 1.9KA, 8.5KA, 11.5KA, 35KA
CMP on STI, contact, via and passivation
MoM capacitor
Passivation: dual layers
Options that need special attention
SRAM Cell
Vt’s: maximum of 4 VT types in one design.
Wafer size
12 inch
Deliverables
100 dies, no wafer
Design tools
PDK: TSMC iPDK
Simulation tools
Hspice, Eldo, Spectre
Verification tools DRC
Cadence, Mentor Graphics, Synopsys
Verification tools LVS
Cadence, Mentor Graphics, Synopsys
Parasitic extraction tools
Cadence, Mentor Graphics, Synopsys
P&R tools
Cadence, Synopsys
Foundry IP
12-track / 9-track / 7-track core cell libraries, multi-vt’s
0.9V/1.8V hybrid staggered (fail-safe digital and regular analog) I/O library
SRAM compilers by TSMC , ARM, Synopsys
MPW block size
6mm² (on silicon)
