0.18 µm CMOS Image Sensor 1.8 V/3.3 V 2P4M Metal Metal Capacitor Process Design Support
Technology characteristics
Shrink technology: NO
Core voltage: 1.8V
I/O voltage: 3.3V
Shallow Trench Isolation (STI)
Twin well
Substrate resistivity: 15~25 Ohm.cm on <100> P- substrate
RVt, 1.8V LVt N/PMOS, 3.3V LVt N/PMOS, Zero-Vt NMOS
Temperature range: -40C to 125C
# of metals: 4
Interconnect material: Al
Dielectric: FSG
Top metal: 5KA
Inductors
MiM: 1fF/µm2
Poly/Poly capacitor: 3 fF/µm2
Passivation: single
Wafer size
8 inch
Deliverables
# of dies: 50 for an MPW, 25 for a mini@sic run
Design tools
Cadence CDBA, Laker
Simulation tools
HSPICE, Eldo, Spectre
Verification tools DRC
Cadence, Mentor Graphics, Synopsys
Verification tools LVS
Cadence, Mentor Graphics, Synopsys
Parasitic extraction tools
Cadence, Mentor Graphics, Synopsys
P&R tools
Cadence, Synopsys
Foundry IP
Faraday standard cell libraries
Faraday I/O library 3.3V
Faraday memories
MPW block size
5mm x 5mm
